Heat die construction, heater distance

[bigben2k]

I'm trying to calculate the temp gradient through the CPU core, to replicate it using copper. So I'm starting with the assumption that the actual heat source of the core sits under 1 mm of silicon.

Someone check my math here:

From:
http://forums.procooling.com/vbb/showthread.php?t=8433

Copper:
Thermal conductivity [/W m-1 K-1]: 400
http://www.webelements.com/webelements/ele...xt/Cu/heat.html
(392, 400... :rolleyes: )

Silicon:
Thermal conductivity [/W m-1 K-1]: 150
http://www.webelements.com/webelements/ele...xt/Si/heat.html

Formulae:
Q=-k*A*dT/L

where:
Q=let's say 75 Watts
k=400W/m*°K, 150 for Silicon
A=0.0001m^2 (10 mm by 10 mm)
L=0.001m (~1 mm thickness)
dT=X

Silicon:
75=-150*0.0001*X/0.001
I can resolve X to: 5 deg C, which is the delta T.


So to get a delta T of 5 deg C with copper, the distance (L) must be:
Q=-k*A*dT/L

Q=let's say 75 Watts
k=400W/m*°K
A=0.0001m^2 (10 mm by 10 mm)
L=X
dT=5

75=400*0.0001*5/X
I can resolve X to: 2.7e-3 (0.0027)

And that's 2.7 mm.


Looks like this cartridge is going to have to go vertical, with the tip of it at ~2.7mm from the surface of the die.

If the heater cartridge is too far, the temp gradient is going to create a high temp at the test element (aka water block), and ... :shrug: (brain fart).

[jaydee]

If it is insulated well then won't the simulator heat up to a certain point and stay consistant? What does it matter were the heater is?

[bigben2k]

Let me see if I can make sense of it...

The copper, i believe, is going to build up in temperature, throughout the distance between the heater and the top of the heat die. The minimum temperature will be that of the cooling solution, as it deals with the wattage. The maximum temperature...

Ok, I think you're right: it's not going to make a difference, other than the heater cartridge getting to a rather high temperature. Watts are Watts...

Let's say I'm looking at 1 inch (25 mm, for the sake of argument) between the top of the die, and the heater:
Q=-k*A*dT/L

Q=let's say 75 Watts
k=400W/m*°K
A=0.0001m^2 (10 mm by 10 mm)
L=0.025m
dT=?

75=400*0.0001*X/0.025
I can resolve X to: 46.9 deg C, which is above the cooling solution temp (plus baseplate, plus TIM joint), so maybe 80 deg C.

As long as the cartridge can take 80 deg C, while outputting 75 Watts, it should be ok, right?

[bigben2k]

Ah! I answered another question!

In order to take a temp measurement at the heat die, I can simply set the temp probe at ~2.7 mm under the top of the heat die, to replicate the temp of the core under a 1 mm layer of silicone! :D


Of course this assume that the circuitry within the die is actually at 1.0 mm under the top... Anyone shaved a CPU core recently? :D


Additional: Yeah, the cartridge can take the heat:
http://www.watlow.co.uk/products/heaters/cartridge.htm

Max operating temp: 540 deg C.

[j813]

Just measured a Morgan1200 and a T-BredB1700+ with a conventional Caliper, the Duron is less than a MM the TbredB is about 1mm, correct if I'm wrong though.
My guess is it's not 1mm under the top.

Sorry for not answering your question.

[nicozeg]

Formulae:
Q=-k*A*dT/L

where:
Q=let's say 75 Watts
k=400W/m*°K, 150 for Silicon
A=0.0001m^2 (10 mm by 10 mm)
L=0.001m (~1 mm thickness)
dT=X

Silicon:
75=-150*0.0001*X/0.001
I can resolve X to: 5 deg C, which is the delta T.


So to get a delta T of 5 deg C with copper, the distance (L) must be:
Q=-k*A*dT/L

Q=let's say 75 Watts
k=400W/m*°K
A=0.0001m^2 (10 mm by 10 mm)
L=X
dT=5

75=400*0.0001*5/X
I can resolve X to: 2.7e-3 (0.0027)

And that's 2.7 mm.



There's a lot easier formula:

400/150 = 2.666 :p

It's useful to discard redundant and irrelevant data before making the calculations ;) (and more precise too)

[bigben2k]

Just measured a Morgan1200 and a T-BredB1700+ with a conventional Caliper, the Duron is less than a MM the TbredB is about 1mm, correct if I'm wrong though.
My guess is it's not 1mm under the top.

Sorry for not answering your question.
Nice, but is that the measurement of how far the die sticks out from the top of the ceramic? I'm looking for the actual thickness of the silicone, from the top of the die, shaved down to the actual circuitry *inside* the die. Did you catch that?


Thanks Nico!

[bigben2k]

Ok, in an effort to find out in greater detail, the thickness of the silicon layer, on top of the actual CPU core, so that I can determine the optimal placement of the temp probe, within the copper heat die, I came across this site:

http://www.webhelp.org/jonnyguru/mishaps/damagedCPUs/index.htm

While there are no dimensions, it does show that the core is actually resting on top of the ceramic substrate.

So...

According to AMD specs,
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/26237.PDF
the core exceeds the substrate by 0.80 to 0.88 mm.

Obviously there are going to be differences with the various CPUs, so I'm thinking about using another measure, such as 0.40 mm, as the silicone layer thickness. OF course this is for a different area, so I'll have to recalculate...

Let's see if I can get some more core dimensions. :evilaugh:

In the mean time, can anyone make any sense of these thermographs?
http://homepage2.nifty.com/masamoto/DATA15.html

[bigben2k]

Just measured a Morgan1200 and a T-BredB1700+ with a conventional Caliper, the Duron is less than a MM the TbredB is about 1mm, correct if I'm wrong though.
My guess is it's not 1mm under the top.

Sorry for not answering your question.
A little follow up...

It's actually difficult to get specs on the core elevation, because data sheets don't include them anymore: they do have heatspreader info though...

According to Intel Specs, the heatspreader on a P4 rises 2.378 mm above the substrate (min: 2.266, max: 2.490).
ftp://download.intel.com/design/Pentium4/datashts/24988703.pdf

According to AMD specs, the heatspreader on an Opteron or an Athlon 64 rises between 3.05 and 3.35 mm above the substrate.
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/23932.pdf
http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30431.pdf


I need some dead CPUs... :mad: (Anyone?)

[Incoherent]

The wafers that I have dealt with have a thickness of 725µm. This is not necessarily standard, but it'll be in the ballpark. The various metal, oxide etc layers, ~6, would add up to not more than about 1µm so you can disregard them.

It does not matter where you put the element, as long as the whole is well insulated. More important is the thermistor placement if you want a measurement comparable to a CPU. My tests with the flux block show the effective L of the die PLUS(!) TIM =2.65mm of copper in my case, a total C/W of 0.062. This doesn't help much but it suggests that the silicon is thinner than you think. 0.4mm would not be a bad guess I'd say.

Possible hint: use two thermistors with a known spacing in line with the load to water path, a la "fluxblock". Then you have the gradient. And hence a second power measurement to back up your voltage/current calculation.

Cheers

Incoherent

[RoboTech]

Hey Ben,

I'm trying to understand why you are worried about exact heater cartridge placement/spacing from the die surface?

A homogeneous block of copper is going to have very different thermal properties than a fabricated silicon wafer/IHS no matter what you do. The spacing or distance from die surface to heater centerline will affect the resultant Delta T (along with the material's Therm Cond and heat load). When using copper you can mount the heaters relatively far from the die surface and still not see too big of a Delta T - well within the limits the heaters can withstand. So what difference does it make???

[BillA]

"So what difference does it make???"

exactly

[bigben2k]

Yeah, sorry, just took me a bit of time to figure it out (hence "brain fart"). ;)


I agree with 0.40mm, as a "best guess" estimate. Given that the core sticks out by 0.80 to 0.88, and that the layer of the actual core is ultra thin and more than likely "in the middle", 0.40mm makes some sense.

I'll run some calculations and see what happens (I'll post all details, for those interested).


Maybe I can compare temp/power readings with some of pHaestus' work, and see how close I am at simulating a CPU temp probe. I'll have to account for a Duron core.