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Originally Posted by Cathar
The wb is being manufactured to provide low temperature readings on a flawed testbed by exploiting the very same flaws that were observed to give erroneously low results.
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so the TTV setup is flawed? how is the TTV test setup less representative of our application than the "other" (copper die) setup? or is there a discussion on these forums that I missed?
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Originally Posted by FooTemps
Okay, about the IHS vs die readings... If we look at the real world applications, there are so many bad IHS to die interfaces on processors these days. There are people who get strange temps because of these poor interfaces. I'd rather measure from the die for this reason...
Think about it... Does it make sense to measure the middle layer when we actually want to know how effectively the bottom layer is cooled?
Excuse the crude paint drawing...
Would you measure the item that generates heat or just a layer the heat transfers through?
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if the TIM joint (inc IHS) is poor, then should it be ignored? if the TIM joints (still including IHSes) are inconsistent from the factory (as is widely reported on forums for AMD's processors), then it should be tested and stastical variances quantified. no?