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Unread 12-15-2005, 10:13 AM   #551
gone_fishin
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by GlassMan
Back handed way to use the TCC for measurement http://forums.procooling.com/vbb/showthread.php?t=12516

http://download.intel.com/design/Pen...s/30255304.pdf Section 4 discusses both systems.
Nice link.

Now the picture is crystal clear.
There are only 2 sensors in a P4. (no mysterious 3rd one)
PROCHOT and THERMTRIP are registers which are either active or non active. They are set to active when a set temp is reached.
These two set temps are unique to each processor.
The trigger temp for PROCHOT and THERMTRIP is taken from the same temperature sensor.
THERMTRIP is always set higher than PROCHOT
THERMTRIP and PROCHOT temp triggers are set at factory and cannot ever be changed.
The only other temperature sensor is the on die thermal diode and has nothing to do with PROCHOT or THERMTRIP.


Using logic.....
Intel must take readings from the thermal sensor to determine each individual processors PROCHOT and THERMTRIP set point. Once they are determined and set, the functionality of the thermal sensor is only to indicate these 2 trip points to set the PROCHOT and THERMTRIP registers active. We know it is located near the ALU units so it may be logical to assume these trip points are ALU unit specific instead of P4 processor as a whole specific. After all if the ALU units fail, the processor is junk.

After all of that, I do not see the value of getting readings from this thermal sensor. It is uniquely callibrated per processor and near the hottest and most fluctuating heat source the ALU units. There are factors to consider that makes no 2 ALU's have the same heat output like voltage leakage.
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Unread 12-15-2005, 10:14 AM   #552
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Default Re: Apogee from Swiftech...

Quote:
and since it is just a transistor then yea sampling speed and accuracy are inversely related because the reader has a finite number of bits to work with.
Edit:Oops, not thought out well, at all I believe the Integrated Thermal Sensor (ITS) is one bit. Very fast and accurate, at it's factory calibrated set (trip) point (135C?)
continue edit. We know TCC operates very fast, and we would think it is very accurate since it is supposed to keep the chip from frying while not causing performance issues,

Last edited by GlassMan; 12-15-2005 at 11:23 AM.
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Unread 12-15-2005, 10:23 AM   #553
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by GlassMan
I believe the Integrated Thermal Sensor (ITS) is one bit. Very fast and accurate, at it's factory calibrated set (trip) point (135C?)

There is no magic 135C number. The data sheet specifically says,

"The temperature where the THERMTRIP# signal goes active is individually calibrated during manufacturing."

That means each processor has a unique real trip point temp ie some get hotter than others and still function normally.

It also says,
"The temperature where THERMTRIP# goes active is roughly parallel to the thermal profile"

I do not get "calibrated" to mean the sensor was adjusted to an artifical number like 135C. I get the "calibrated" means the temp determined to be the trip point. It says the temperature is calibrated not the sensor.

You would have to find a tech data sheet on these Thermal sensors themselves to determine how they are calibrated before Intel takes any reading from them.

Last edited by gone_fishin; 12-15-2005 at 10:42 AM.
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Unread 12-15-2005, 10:31 AM   #554
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Default Re: Apogee from Swiftech...

gf
is this not the binning process ?
why expect CPUs binned on the basis of heat X performance into groups, to be individually the same ?
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Unread 12-15-2005, 10:37 AM   #555
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Default Re: Apogee from Swiftech...

one bit DAQ plus fast and accurate do not compute?
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Unread 12-15-2005, 11:20 AM   #556
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by BillA
gf
is this not the binning process ?
why expect CPUs binned on the basis of heat X performance into groups, to be individually the same ?
They are obviously not the same. It does not say binned cpus of the same mhz rating have the same THERMTRIP# it says each individual processor gets a unique THERMTRIP#. There are other factors obviously in binning besides the heat tolerance of the ALU's.
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Unread 12-15-2005, 11:39 AM   #557
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by pHaestus
one bit DAQ plus fast and accurate do not compute?
edited, as not thought out, accurate as in over or under whatever the set temp (output) is
Data sheet http://download.intel.com/design/Pen...s/30750602.pdf Section 5
I believe it is set to 1 temp, trying to figure out the "crash temp" of every intel cpu is impossible. 135C is a number that has been floated around here that sounds reasonable, I don't think anyone thinks it is factual. We do know that Thermtrip# is set to appx Tc=90C 3.0 gig and higher cpu's, Table 4-3 and Table 5-2. If 135 C is a reasonable , is 175C reasonable to shut down the cpu?
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Unread 12-15-2005, 11:39 AM   #558
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by pHaestus
one bit DAQ plus fast and accurate do not compute?
Alas it is all for not as the traces are likely disconnected in packaging after the THERMTRIP# and PROCHOT# are set. With their duty firmly set, Intel likely didn't want anyone ****ing with them. If you can tap into it for a reading then you could send a killer voltage to it ruining the thermal protection resulting in possible monetary loss in replacements.
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Unread 12-15-2005, 12:03 PM   #559
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Default Re: Apogee from Swiftech...

which leaves as a 'real' temp related to the CPU temp (that may be caled) . . . .
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Unread 12-15-2005, 12:06 PM   #560
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by GlassMan
edited, as not thought out, accurate as in over or under whatever the set temp (output) is
Data sheet http://download.intel.com/design/Pen...s/30750602.pdf Section 5
I believe it is set to 1 temp, trying to figure out the "crash temp" of every intel cpu is impossible. 135C is a number that has been floated around here that sounds reasonable, I don't think anyone thinks it is factual. We do know that Thermtrip# is set to appx Tc=90C 3.0 gig and higher cpu's, Table 4-3 and Table 5-2. If 135 C is a reasonable , is 175C reasonable to shut down the cpu?

It is impossible because every single cpu is set differently.

Tc is not related to PROCHOT# or THERMTRIP#. It is the design specs oems use to design their thermal solutions to be in spec to case temp when operating within thermal design power (TDP).

quote,
"We do know that Thermtrip# is set to appx Tc=90C 3.0 gig and higher cpu's"
end quote

So we get shutdown when the case temp is near 90C. How does that relate to the thermal sensor and what it actually reads near the ALU? It tells us nothing.
Some processors will handle more voltage and higher clock rates before reaching a case temp of 90 under the same heatsink.
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Unread 12-15-2005, 01:13 PM   #561
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Default Re: Apogee from Swiftech...

GF, I finally found the quote, design 4.2.1 and I don't think it is as conclusive as you do.
It says that each cpu's is temp is set individually, just because that temp is not stated, doesn't mean that the temp isn't the same, and we know each sensor is unique. How ever it is done, intels interest is keep the chip from burning up, not throttle enough for the customer to notice, and do it quickly for millions of chips. Intel I'm sure knows what temp their silicon is good for. Chips that run hot become 2.8's with lower tdp. Testing and setting individual chip temps is flexible but benchmarking each chip is time consuming. Puting a test input to the ITS and setting a register based on the results is fast.
Yes to the rest, I didn't mean to imply differently, I was asking if those temps sounded reasonable. I am curious about the internal temps,
The fact that intel releases a # at all implies that it is pretty uniform to TDP.
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Unread 12-15-2005, 02:58 PM   #562
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Default Re: Apogee from Swiftech...

Quote:
... you guys will argue about EVERYTHING.
Quote:
Originally Posted by Marci
but... but... it's the one thing we're ALL good at!
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Unread 12-15-2005, 03:06 PM   #563
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by BillA
which leaves as a 'real' temp related to the CPU temp (that may be caled) . . . .
The IHS grooved TC.
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Unread 12-15-2005, 03:08 PM   #564
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by gone_fishin
Lol, sorry to laugh Cathar but where are you going with this? First you say the THERMTRIP is wildly inaccurate then you want Intel to make it accessible.
Where did I ever say this. Go on. Find the quote.

I said I wanted the thermal sensor that feeds THERMTRIP to be visible

Quote:
Originally Posted by gone_fishin
Now the picture is crystal clear.
There are only 2 sensors in a P4. (no mysterious 3rd one)
PROCHOT and THERMTRIP are registers which are either active or non active. They are set to active when a set temp is reached.
These two set temps are unique to each processor.
The trigger temp for PROCHOT and THERMTRIP is taken from the same temperature sensor.
THERMTRIP is always set higher than PROCHOT
THERMTRIP and PROCHOT temp triggers are set at factory and cannot ever be changed.
The only other temperature sensor is the on die thermal diode and has nothing to do with PROCHOT or THERMTRIP.
Quote:
Originally Posted by Cathar
A third diode perhaps? Or perhaps, and more likely, a second thermal trip sensor (ie. THERMTRIP) calibrated to 135C and driven by the same thermal diode that drives the PROCHOT trip sensor, which in turn drives the Control Circuit.
Arguing over agreement. What a waste of time.
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Unread 12-15-2005, 04:37 PM   #565
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by Marci
but... but... it's the one thing we're ALL good at!
You know, if that didn't have swearing in it, that'd make my signature.

I'm trying to get information back from the Intel thermal testing lab so that I can talk to some of their engineers. I have a friend that works there and I have dim hopes of adding fuel to this fire.

By fuel, I mean verifiable DATA and DESIGN information. We'll see.
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Unread 12-15-2005, 10:38 PM   #566
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by bigben2k
The IHS grooved TC.
that's exactly the arguement though. Tcase vs. Tjunction. The two aren't related I don't think. In fact I don't think Intel considers Tjunction for any of its therm mgmt apps (i haven't been reading any of these linked datasheets from marci and others, though, I read a bunch long ago, doubt they've changed a whole lot). From Intel's perspective the only temperature relevant to thermal management of their processors is Tcase...that's why the on-die diode is located in what cathar calls a misleading position on the die. It isn't misleading, it is in a good location to formulate Tcase.

But cathar's position (and he's said ALL this before i think) is that Tjunction is more relevant from the perspective of the enthusiast/overclocker. The fact is, I think that we should consider the possibility that there is a fork in the road when it comes to thermal management performance. Performance that leads to better overclocking and performance that leads to lower Tcase just may be different things.

On these forums with these many words each day, I think a few things may need rereclarification.
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Unread 12-16-2005, 05:23 AM   #567
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Default Re: Apogee from Swiftech...

Quote:
I'm trying to get information back from the Intel thermal testing lab so that I can talk to some of their engineers. I have a friend that works there and I have dim hopes of adding fuel to this fire.

By fuel, I mean verifiable DATA and DESIGN information. We'll see.
Makes two of us then...

Quote:
but... but... it's the one thing we're ALL good at!
Where's the swearing??
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Unread 12-16-2005, 05:30 PM   #568
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by Marci
Makes two of us then...



Where's the swearing??

Hmmm.. the swearing was in what you were replying to. I think it was dammit or somesuch mild swearing.

I'm getting interesting information back from this guy. I hope he gives me permission to publish it. Nothing groundbreaking so far, though. Just enough information to make me think I've got a really good person to talk to.
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Unread 12-17-2005, 09:54 AM   #569
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Default Re: Apogee from Swiftech...

I have an apogee question ...

I want to use 2 csp-mags with my pa160 and apogee loop. Which config would get the best performace results ...parallel or series?
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Unread 12-17-2005, 02:47 PM   #570
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by Brians256
Hmmm.. the swearing was in what you were replying to. I think it was dammit or somesuch mild swearing.
I too quoted the line, but removed the D-it with three ...
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Unread 12-17-2005, 06:02 PM   #571
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by csimon
I have an apogee question ...

I want to use 2 csp-mags with my pa160 and apogee loop. Which config would get the best performace results ...parallel or series?
Parallel... (the Apogee has low flow resistance so the overall system should respond better to the higher flow generated by two pumps in parallel)
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Unread 12-17-2005, 09:01 PM   #572
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Default Re: Apogee from Swiftech...

I think that I MAY be able to help with some REAL info from Intel too.

I will talk to some higher up ppl to see if I cant get more info.
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Unread 12-18-2005, 12:43 AM   #573
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Default Re: Apogee from Swiftech...

http://translate.google.com/translat...language_tools

hi ho
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Unread 12-18-2005, 12:31 PM   #574
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Default Re: Apogee from Swiftech...

not bothered...
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Unread 12-18-2005, 01:38 PM   #575
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Default Re: Apogee from Swiftech...

Quote:
Originally Posted by BillA
Isn't cooling-masters the guy who now works for Swiftech? Stephen is who I mean.
http://translate.google.com/translat...language_tools

If so, how can we even consider this as a review?

*edit* I see the review was done by Rosco, who I do respect, but in this situation, I don't know what to think about the review.
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