Intel uses Swiftech for the torture test rigs.

Excellent work.
Have you you any indication of the cooling by secondary paths.Comparing* data from Insulated Simulated Die testing(95+% efficient heat transfer) with Thermal Diode CPU testing there is an indication that this may possibly be as high as 40% with a 100+w CPU.The secondary heat path issue and problems( as encountered by Billa**) with the constancy of the Thermal resistance of the Waterblock/Die(Transistor) interface are possibly the key to getting controlled repeatable conditions:
From your "Testing Coolers" presentation*** I have particular problems with this.:
"Thermal paste: To eliminate the first variable I simply changed thermal paste (initially I didn't want to waste the expensive stuff on testing!) from silicone-based to Arctic Silver II. This lowered the thermal resistance of the waterblock to 0.63oCW-1 - an improvement of just over 0.1oC. This figure allows an estimation of the thermal resistance of the interface between waterblock and transistor, knowing that AS II is about 10x the thermal conductivity of silicone based paste: Silicone paste ˜ 0.11oCW-1; AS II ˜ 0.01oCW-1. Note that these are approximate figures."
Surely for your load of 25w a change in thermal resistance from 0.74C/W to 0.63C/W should give a temp change of 2.75C and not 0.1C Alternatively the quoted "0.1C improvement" is equivalent to a reduction in thermal resistance of 0.004 C/W and gives,IF it is directly related to the TIM's thermal conductivity, waterblock/transistor interface resistance figures:- Silicone - 0.004C/W , AS II ~ 0.0004. For a similar size ASII interface(10mm x 10 mm ish) Billa** has been deternining Inconstant values from 0.16 - 0.2.3 C/W.

A note on the thermal impedance figures, presented by EMC2, for Thermagon products.:
e.g. T-Pli 210 @ 10PSI - 0.18 C-in^2/W ..... This translates to a thermal resistance of 1.16 C/W for a 10mm x 10mm die/transistor area .

* http://forum.oc-forums.com/vb/showth...threadid=75649
** http://forums.overclockers.com.au/sh...threadid=37515
*** http://www.cheese83.freeserve.co.uk/...ng/testing.htm

Les - that's why I said earlier "not using a CPU for the testing". Compared to a mil thick layer of quality thermal compound it sucks for transfer, but the reason for it's use here is the consistent and repeatability if you control the interface pressure ;)

Unreg - you wouldn't happen to have an angled view of that would you? (say 45 degrees) :)

Les: Oops. That bit should have said "an improvement of just over 0.1oCW-1." (from 0.74 to 0.63).

At the moment, all I have done to insulate the heat source is mount it on a thick piece of glass, which stops heat escaping backwards. The sides of the heat source are still exposed. I should make an insulating gasket I suppose.

gogo/EMC2: I see what you mean. You want consistency between different blocks, which may have slightly different mounting surfaces. The problem is that if I use a pad, I have to know what its thermal resistance is and subtract it from my measurements, whereas with ASII I am happy to leave it in because it reflects the total thermal resistance that affects a CPU. Also, as you said, the consistency of thermal pads requires consistent pressure. I do not have a means of measuring mounting pressure.

edit: Arghhh! HTML is turned off! How am I supposed to do superscript?

Evil - if you are looking at the relative merits of different surfaces, there really isn't a need to subtract it out. Whether it goes from 1.2 to 1.1 or .4 to .3, you would still see you had a 0.1 improvement :)

Regarding mounting pressure - if you use bolts with springs and teflon washers between the springs and the bolt head on 4 corners, then you can control the mounting pressure consistency with a good torque wrench or a good machinist's ruler (spring compression height).

Oh, superscript without HTML? Just use ^ to indicate a superscript, or in the case of the degree symbol, leave it out, since most would know if they see 20C it is degrees.