T junction temp
 

no mystery to Tj
far too much poo over really basic stuff

http://www.relexsoftware.com/resourc..._heatsinks.asp
http://www.electronics-cooling.com/h...alccorner.html
(MANY additional sources of the same calcs)

when Tcase is known, so too is Tjunction in the electronics packaging world
WCing is no different, just done by people outside the industry lacking a value for θjc
(or either of the others in reality, several test benches are capable however)

θjc = Thermal resistance between the die and the package case (the IHS for us)
θcs = Thermal resistance between the case and the heat sink (or waterblock)
θsa = Thermal resistance between the heat sink and ambient (or waterblock and coolant)

a rational discussion focuses on the uncertainty associated with each of the 3 above independent variables;
this uncertainty discussion relates to ONLY test equipment and methodology issues - nothing else

- if the same source, which includes θjc, is used to test various components then the absolute value of θjc is moot; the results include θcs + θsa and this 'we' call comparative testing (a bit sloppy eh ?)
- if different sources are used to test the same device then the variation will be due to the sum of θjc + θcs (with that same slop due again to the inclusion of θcs)
- if θcs is known or can be measured, which it can be, then θjc can be deduced

no magic, simple arithmetic will suffice (with very high tech testing)
so as a practical matter for WCing or hsf designers, the assumption of a value for θjc is quite reasonable;
Tj is a 'feel good' number for sink designers - it does not define the efficacy of a cooling solution

consider it now from a different perspective:
which is greater; the variation in θjc or that due to θcs ? - and by what order of magnitude ?
I will not insult the readership by stating the obvious.

science works better without polemics

EDIT
wrong terms included in second example, now corrected - sorry
RE-EDIT
jeez, had it correct initially; changed back (need to drop this whole thing !)

Re: T junction temp
 

I'll play the role of the un-insulted readership. ;)

I'm assuming that θjc is composed of 1) the IHS and 2) the tim joint (between it and the die). I would not expect much variation on that (I am ignoring proponents of 'otherwise', for lack of data).

pHaestus last posted water block review data shows variations (due to multiple mounts, 5 to be exact) in the range of almost 0.4 deg C (on a specific wattage).

I vote for #2.

As for order of magnitude, I do not know the actual variation of #1; I'm assuming that it would depends on what varies, with would be the clamping pressure, and its geometry (i.e. from a non-flat water block, but that's really a stretch; the nickel plated copper IHS isn't going to flex a whole lot).

The only reference data (if it can be called that) that I know of, is those reported experiences from users reporting better temps (on bare die CPUs) by clamping the block way over the specifications. I have seen none for capped CPUs.

Re: T junction temp
 

consider 2 θjc scenarios:
1) AMD, Tim1 grease joint + IHS; ample evidence of variability/limited longevity (# of temp cycles or mountings)
2) Intel, Tim1 indium soldered + IHS; very sparse notation of variability/limited longevity
- note that absolute uniformity is not being described, just a relative comparison

θjc is the sum of both elements and will be different for each, and for AMD is known to increase over time
- note that clamping force will not change a soldered Tim1, though it can affect the IHS contact area

now consider θcs, lots of #s for this variation from pH, Lee, myself (on the TMT site), and hugely affected by the clamping force AND sink flatness

I 'know' both values (wrt Intel and Tim2) and the notion that θjc is a variable precluding hsf or wb design is simply wrong;
- on the BEST day, Tim2 = 2xTim1; typically far worse for 'field' applications

but the 'issue' has always been the allegations of θjc variability despite an entire thermal management industry based on the opposite

-> (non)flatness has a far greater effect than θjc, why is this ignored ?

crap, back on the soap box; all your fault Ben

Re: T junction temp
 

...alll founded in incongruent results which fail to support the supposition that 8jc variances are as small as assumed.

Sadly, not figures available for public consumption.

If the figures are off, and 8jc variance really is of little consequence, then what makes the rest of the data from the same testbeds any more trustworthy?

Scenarios may have improved since then. Things may well be different now as opposed to even testbed items produced 18 months ago. Not enough public data to safely make the assumption either for or against, and that is the biggest issue. Faith alone is not enough for some.

Re: T junction temp
 

Additionally, the call for Tjunction was not intended as a pure measure of cooling device performance. Seems that this point has been lost, confused, and reused as attack material over time.

The call for Tjunction was for data with respect to measuring the variances in 8jc.

It was stated then, and still is now, that if 8jc is proven, rather than assumed, to always be of minimal consequence, then Tcase would then be a perfectly acceptable measure of cooling device performance.

Again, faith alone is not enough for some, and in the light of incongruent results, unjustified.

Re: T junction temp
 

I gotta jump on this, because I'm closer to real testing (gonna dump 'theoretical cooler'): this is about TIM variances, which has been concerning me for some time: how do I know that I can repeat the same TIM application one year from now? (hint: I dunno). See below, as it applies to me, twice.

As is known, I have considered acquiring TIM film (of the thinnest grade available, actually have samples), for the simple sake of repeatability. Many are available. Some require curing.

As is also known, I am capping my copper heat die with a real IHS; another TIM joint. (let's keep unrelated issues outside this thread, if anyone objects, ok? :p ) and taking temp measurements as follows: Intel style IHS groove, and 1 or 2 readings in the heat flux, Incoherent style. (I'm still working out the construction details). As a result, I ought to be able to detect 'unusual variations', and should have some very interesting data after several blocks, but I am not testing with Intel's Indium (unless I can source it, then I might consider it).

While it's been previously suggested that comparison tests be run between
real cpu and heat die, I know of no tester willing to go both routes (me included). That would have to be a collaborative effort. Anyone?

Back on topic.

If Tcase is measured with a groove on top of the IHS, couldn't we simply measure Tj with a groove under the IHS? Hum, babbling again... I'd have to groove the top of my heat die, and slip the thermocouple under the TIM (1) joint. ... which I'm not going to do because I'm not comfortable with the impact on the measurement of Tcase, and I'm not building two heat dies (well I am, but they're different sizes). I will however have temp readings below what would be Tj...

So... order of magnitude (of the variation?)... TIM2 > TIM1 by a factor of (at the very least) 2? ... and of course, it isn't nearly as important as the flatness of the HSF/Block. ... so ... TIM1 is more reliable (than TIM2) because the IHS "spreads" the clamping pressure more equally than what TIM2 is subjected to, when the HSF/block is not flat (or more precisely, doesn't match the flatness of the IHS, when clamped).

(sorry, flexing out new "rambling" style)

Re: T junction temp
 

Stew; as an industry 'outsider' there is no expectation that you be correct
you have made your point (yet again), now let it be

are you going to Semi-Therm ?
I will be there, as will a number of the companies with whom I interact; a different world

this thread is in Bill's Blog Bog, the quagmire of reason and tolerance

Re: T junction temp
 

I dislike the dismissal of the seeking of knowledge. In all of the opening post, the same basic assumption is being made.

I may very well be wrong, but do these companies test for varying degrees of heatsink non-flatness or base flexing scenarios? Non-flatness, sometimes yes, but for flexing? Certainly not in any papers I've ever seen.

All I've see to date are assumptions, and the opening post is more of the same.

No. Am not going to Semi-Therm. Not my professional career. If you are there, find someone who does this stuff within Intel for a living, and run the question of flexing due to very thin heatsink materials by them, and see what they say, for both present and past IHS solutions, and do so with out any prior prejudicial pretext to the question. It's what I'd ask if I were there.

I'm out.

Re: T junction temp
 

not too enamored of the 'rambling style' Ben
try premise, facts, discussion, conclusion
easier to follow

sure the case and sink can both be grooved (or drilled), but if superimposed will interact; if offset must be isothermal flux
the direct measurement of Tj on silicon is a whole 'nother issue (beyond my kinda stuff technically)

Re: T junction temp
 

From what I've read, copper (i.e. the IHS) flexes a lot more than I expected.

As per Intel info on the groove, "all machine surfaces to be #32 mill finish or better" (Now the Frostytech site info makes more sense). Now does this apply to the contact area of the IHS?

Gonna dig up more info on "#32 mill finish" and other ratings. Back tmo.

Re: T junction temp
 

Stew, in conclusion eh ?

the initial post was to describe the relationship between Tj and Tc, know one and the other can be addressed
for 'packages' the conformance/compliance is always an issue, and a big one
for sinks (on a TTV) not, due to the assumed sink flatness and relative stiffness

so if a wb bp is neither flat nor stiff the results may not be as predicted, this is the sos
has no bearing on the validity of the TTV as a test bed, note that a CPU has exactly the same issue;
just means more testing, christ - put it on a CPU eh ? (I think several folks do just this)

R.I.P.

Re: T junction temp
 

On a related note, in my readings of electronic trade magazines, there is a growing emphasis on functionality testing (for QA) including thermal properties, to be built-in. As we enter 45 um, there will not be any more trial-and-error designing; it'll have to work right from the beginning. No room for errors. Maybe we'll see more core temp readings?!?

Re: T junction temp
 

only trial and error in the DIY world
'enthusiasts' do not have good judgment, all about hype

Re: T junction temp
 

I had to respond to this.

Thank You!

Thanks for backing up the entire reason for my argument - that the TTV (or even a CPU) - may very well be a poor choice around which to base an entire marketing campaign of results and claims of supremacy.

As an act of conciliation, I will admit that "flawed" is incorrect word that I got stuck on. "Unsuitable for the purpose when items are out of its intended testing criteria" would be a better description of what I was trying to get at, and I did indeed state that a number of times, but it seems that "flawed" was always raised.

What you described is exactly the issue that I have, and here you are agreeing to it.

I guess I better watch for that bright new shining star on the horizon this evening.

What's the answer. Don't know. Maybe there isn't one. It seems that's left for those who have "better judgement".

Re: T junction temp
 

Yeah, those pesky "enthusiasts". What would they know anyway, and what right do they have to express their experiences at enthusiast oriented websites.

Elitism? Star struck?

It's how it appears.

Re: T junction temp
 

Stew
I let you call baying as crowing despite the R.I.P.
this tit for tat stuff will not happen here
again, let it go

last night my posts to a fool were edited on OCF, now yours here
nothing unique

Re: T junction temp
 

I wondered that as well. hmmm highly irregular

Re: T junction temp
 

feel free to posit a (technical) question bobo, Cathar has an agenda for his fan club
please note the topic

Re: T junction temp
 

Most, most childish Bill. Will post in another forum section where you don't have the powers to delete.

Re: T junction temp
 

Thank you for your understanding

Re: T junction temp
 

I need time to draft a response but given my limited time available to me and the issues that need to be discussed I thought I would give an interim post.

I disagree with the evaluation presented above and consider it an over simplification. I disagree that the numbers for high heat source materials can be analysed in this manner as I do not believe that the variables are independent due to the quasi 1D assumptions made and any rational assumption from that is hence flawed. Chips have variation in heat output between batches and over individual chips surfaces. Junction resistance is variable over the surface.

The question at the end about variation is open to the argument of, so what? The other values are easily changeable and quantifiable; IHS variation is luck of the draw and it has been shown that over the scales we are talking about the variation is important so disregarding is not valid.

As one engineer (believe it was Brunnel) put it and I can name a huge number that have nicked it:

“Show me someone who knows all the loads on their system to within 10% and I will show you a liar”.

Re: T junction temp
 

every item is unique in an absolute sense, and so . . . ?

suggest reviewing the TTV info in the P4 thermal design guide before jumping off the deep end
the TTV was designed for a purpose, and the brouhaha was about its fitness to function in the manner intended

this is not 'deep' science bobo, it is about a heat sink thermal characterization tool
understand the tool and its intended use before mounting the podium

we have already had too many opinions from individuals with NO hands-on experience
and too much speculation about the effects of this or that

this specific thread is merely about the general relationship between Tc and Tj
we all understand that generalizations are not specifically accurate, why they are referred to as generalizations, no ?
Tj is a term from the packaging industry and used as the basis for determining the package efficacy in meeting the design parameters, more generalizations

use the terms as they are used in industry
want more ? go to Semi-Therm next month in Dallas

pick your topic:
the tool,
or the absolute accuracy of a test/calculation method to determine Tj
for Tj feel free to say what you wish, doubt you can do more than ask questions
about the tool you should be prudent, you will be asked to demonstrate the superiority of your methodology - no BS eh ?
(VERY good employment opportunity at hand)

Re: T junction temp
 

bobo
if you want to discuss the TTV I'll start a thread, but I should PM you the other threads before you get into it
lots of 'stuff' out there which is pointless to rehash (and I will not)

Re: T junction temp
 

look forward to your PM im so behind on my thread reading.

EDIT
Oh and i know it is industry practice and i know why it is industry practice but we are dealing with stuff that your average heatsink engineer is not normally concerned with under DIY conditions which constrain knowledge and have to effect our approach.

I'll post more when i have it, i want to make it water tight techincal paper level, which is probably overboard for DIYers but whatever.

In mech eng we have a saying. Design it, test it, paint it then call in the control engineers. As a thermal engineer your the control engineers skivvy which isnt a good place, so we will see how much intel wants to pay me.

Re: T junction temp
 

lol
PM sent
lay in a supply of booze

EDIT
good to see that ....... quote removed, relevance debatable
addl EDIT
was incorrect, the strange quote was in post #21 and remains

Re: T junction temp
 

Not all of them. Seal it up.

I also think this is a 1d oversimplification. The problem is far more three dimentional, especially since I think we are trying to anticipate DIYers often foolish, unconventional, but occassionally meritorious, ideas by designing a waterblock testing setup which can handle a situation where "The expression for psi JT is derived assuming that TT-TA~TJ- TA" is totally invalid.

The whole problem affects the whole problem. It is not a direct heat path. The block design affects the apparent θjc - relationship, even without an IHS.

Example. What happens to θjc expressed as (true Tc- true Tj)/device W when genius Joe DIYer Sixpack decides that his revolutionary waterblock which has a hole drilled down the centre, right above the Tc sensor is the ultimate cooling solution ?

There is sod all heat flux in that path. The relationship, Tc to Tj as a function of device W is lost. (Tc - Tj)/W is not constant.

Re: T junction temp
 

good stuff
I await all
(for SURE its simplified, as the sink solution is interactive; why the die temp goes down eh ?)

good to see you again Inco

Re: T junction temp
 

Hopefully not just a muscle spasm induced lurch out of a cramped lurking position. :)

Re: T junction temp
 

I need to get a spec up of what exactly it is i'm trying to prove. At the moment i have a gut feel and a few good reasons why the whole 1d thing is bunkem, possibly and approach similar to mixing length in a pipe (mixing and heat transfer equations are very very close).

I'm looking at this from more of a block design standpoint and thermodynamics as opposed to a pure testing. I hope to at least get an equation out for a good base plate thickness after that who knows, i hope that i won't reinvent a better wheel but at least show some pointers for testing and improve understanding.

Anyway far to much work on at the moment to give the problem more than an odd thought on the tube.

Re: T junction temp
 

understanding one's goal is ever a good starting point
this thread was about the relationship of Tc and Tj
Tc, where measured and how measured, is just exactly that

since we all agree that Tj is itself a convenient fiction, useful for approximations, virtually any criticism could be made
Tj as used is a silicon design parameter;
take it from there

EDIT
I would add that with a 'large' die the thermal mapping is neither known or constant;
the initial assumptions will perforce carry through all subsequent calcs
GIGO at work if not reasonable
yes bobo, I want to see what you come up with
I somehow sense that there is a shifting target in progress, please do be clear on the intended goal
- BUT, if the basis is a collection of assumptions - what can the results be ?

much better Inco's approach, use data to back into the question