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Unread 12-13-2005, 12:54 PM   #1
GlassMan
Cooling Neophyte
 
Join Date: Nov 2004
Location: Kentucky USA
Posts: 64
Default New Method For Testing Water Block Performance

With the release of the Apogee water block from Swiftech, the has been a lot of discussion about the effectiveness of waterblock testing techiques in making valid predictions of water block performance in the real world, both bare die, and IHS CPU's.
I think we can agree that under identical conditions, the block that delivers the lowest cpu temperature is the higher performing block. The typical approach is to establish identical conditions and measure temperatures. The problem is that these temperature measurements take place at various distances from the core, and/or taken from imitation cores. The correlation to conditions in the cpu core are
questionable.

Things are futher complicated by these three recent results. Three different test methodologies by
competent testers has given us this mess to figure out.

TTV test by Swiftech http://www.swiftnets.com/products/Apogee.asp#


Thermal die test by Robotech at SystemCooling http://www.systemcooling.com/swiftech_apogee-09.html


Thermal Probe testing by Robotech posted at ProForums

http://forums.procooling.com/vbb/sho...2&postcount=93

The first 2 contradict each other, the third shows that the last few years of waterblock developement

would have been better spent blowing on our CPU's.

This is not exceptable,so I propose a new method to help us move forward. the key,
http://www.intel.com/technology/maga...ng/it04021.pdf


the Intel Thermal Control Circuit (TCC) controlled by the Integrated Thermal Sensor (ITS) which is totally seperate from the thermal diode we all know and ignore. Located in the hottest part of the P4 core.

I propose changing conditions in a controlled way to reach a known cpu temperature, the TCC trip point. My belief is that conditions can be set that will just trip the curcuit in a pattern related to the load program used. Changing out the water block with no other changes will result in the trip point not being reached, or being reached more often. The difference of clock speed to match the previous pattern will provide a measurement of performance.

Both voltage and clock speed can be used to contol cpu wattage. Ambiant temperature can be controlled, and heat rejection of the waterloop can be controlled. All directly

One program to detect throttling, http://www.panopsys.com/Downloads.html Throttle watch 2.01. It offers real time detection and logging.

If it works there are many questions we can get insight into. P4 w/epoxied IHS can be compared to P4's w/TIM IHS, which can be compared to naked P4's w/o TIM and IHS. Data from the same P4 with and without IHS will be useful. These actual cpu measurements may corelate to a current test method. A posible method of calculating cpu wattage.
For A64 users, any cpu data is better than thermal probe and diode testing.

Although anyone with a P4 can do this testing and get results, the best results will still come from dedicated Water Block testors, with there superior equipement and skill.

I'm sure there are many problem that I haven't thought of, but I think it is worth trying out. Coming to any conclusions about IHS's and WB performance will need the sacrifice of quite a few Northwood IHS's.

EDIT: forgot to post this link , s775 http://download.intel.com/design/Pen...s/30255304.pdf section 4

Last edited by GlassMan; 12-15-2005 at 09:21 AM.
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