The NB and SB communicate over a special V-Link for the KT chip sets, not over the PCI bus (there isn't a PCI bus connection on the KT-266(A) NB).
Sandra's membench causes no HD activity or other NB<->SB communications to occur and any "background" activity wouldn't affect your membenches THAT much.
Sounds almost like IWill is either a) backing off the memory latency timings severely when you go to the 1/5 divider or b) they are setting the memory to run at the -33Mhz setting (the memory can run synchronously to the FSB frequency or asynchronously at +33 or -33Mhz to the FSB frequency) or c) both. From going back and relooking at the scores you posted, I would have to say either b or c.
If you know how to use Wcpredit, take a screen shot with the 1/5 divider turned on and the FSB at anything over 166Mhz and post it up and I'll be able to tell you what's really going on there
