[satanicoo]

Originally posted by N8
You guys always try doing things the hard way.....

I have stated before that you can (high vacuum) vapor plate or sputter just about any material onto any surface (almost). Sputtering is much more controllable and you can control the thickness better than vapor plating. I have two high vacuum vapor plating machines at work that I use to deposit a 1 micron or thinner layer of metals onto different materials. Aluminum, copper, silver, gold, chrome, nickel, etc. are some of the metals that I use to deposit thin layers. All I need is to make a mask to cover up what shouldn't get plated. You can machine a mask out of metals, or just cut some plastic (like overhead transparency plastic) or mylar into a mask.

The problem with doing such a TIM layer (as I have stated in the past), is that both surfaces (CPU and heatsink), MUST both have a matched flatness tolerance with each other less than the TIM layer thickness. You want a thin TIM layer, correct? Well you first have to have the CPU and heatsink prepared. The P4 IHS is NOT flat at all, forget about the P4 at this time. The AMD core is going to be pretty damn flat, and I wouldn't worry about lapping it. You will most likely round the corners off and make it more rounded than flat if you try to lap or polish it. The real gains here are to be made in making the heatsink surface flat. Technically, you only need the heatsink to be flat where it mates with the CPU. Think you guys can get the heatsink flat to less than 1 micron of tolerance? I am not talking about polish either. I am talking about FLATNESS, or deviation from a plane surface. It is hard to do. I can do it, but I have the equipment and 10+ years of job experience.

When you get down to that level of flatness, then you have to worry about surface roughness (polish) affecting the contact and TIM interface. The more polished your surface the less TIM you should be applying, otherwise you will be creating a TIM layer that HAS to be squished out as there is no surface roughness for the excess TIM material to flow into. It can only displace at the edges of the CPU/heatsink interface.

If you can get the FLATNESS tolerance and the POLISH tolerance down far enough (I don't know exactly what that level is), you can forget about using a TIM at all, as it will only be a detriment.

I have tried and done this and the big problem (and I mean BIG problem), is that whenever you mate two near flat and polished surfaces together, they suction to each other, and at that point, you CANNOT try to move them around to fine tune the alignment of motherboard holes, heatsink holes, etc. as the surfaces will literally rip each other apart and create voids, pits, and high spots and conglomeration lumps. They basically surface-weld to each other, which is exactly what we want, but you have to get it correct the very first try.

I don't have it tested yet (I just finished sealing the barbs in last night), but I just made a 'rotor'-style waterblock with the mill instead of a drill press, 1/4" OFHC (oxygen-free high conductivity) copper, o-ring, and a 3/4" polished plexiglass top. On the copper plate I was able to get both surfaces parallel to each other within 1 micron, and the surfaces lapped and polished to approximately 1 wavelength of light. With the bulb I am using, that is flat to within .0000232", or 0.6 micron. I only bothered with a 3 micron surface finish (polish), as I will be using some AS3. I could vapor plate a layer of copper onto the Barton 2500 I just got, but I don't feel like it, or have the time for it. Been running this Barton 2500 (1830 MHz) for 1 week now with the retail heatsink and retail TIM, and I have had it up to 2200 MHz with only 1.8v so far. If the leak testing goes well, it will have chilled water cooling.

Don't ask when I will put up pix, just wait a bit, and I will start a new thread.

What do you think, is it possible to make a layer of +-5 mm on top of the cpu?