AMD patents on-chip pelt

[Nightfall]

http://www.theinquirer.net/?article=19205

Don't know if I should have put this in the pelt section as it is more less news but this is pretty interesting. We have finally come to the point (soon) where OEM cooling won't just be a HSF.

[pHaestus]

interesting...

[Tempus]

maybe its just me and my browser but I'm getting nothing on that link.

edit: opps I lied. Its working now.
Very cool.... punny huh.

[cougem]

Yeh, let's just hope it's a patent with intent, rather than a patent for the hell of it.

[Tempus]

blocking patent just to beat intel there?


that whole Mobo price thing worries me. any truth to it?

[Nightfall]

Why would the motherboard require such expensive high quality capacitors if the TEC was powered by your PSU and not through the CPU socket? I do not understand...

[Tempus]

I _think_ it was a logical result of the shrinking of the fab size and had nothing to do with the pelt.

Something about how shrinking from 130nm to 65nm added +100% load to the mosfets or something. Not sure how/why but I'm not an electrical engineer either.

[Cathar]

I didn't think that TEC's could sufficiently move heat densities as high as CPU's put out?

The highest heat density TEC that's commonly available are the 172W 40x40mm TEC's, which when all's said and done, can deal with heat densities of around 10W/cm². CPU's are up around 100W/cm², so does AMD have some magic to make TEC's 10x more effective, or is this just a patent for patent's sake?

If they really do have a 10x more effective TEC, I've love to see it though.

[Groth]

/Edit: Damned tabbed browsing! By the time I read all the open tabs, someone beats me to the response.

/Edit 2: With a cursory read of the patent application, things make more sense. The peltier junctions would be micro- or nano-scale and integrated into the wafer. Looks like they intend to use them only to help cool the hottest regions, so the extra power/heat wouldn't be too large. They would have to powered by Vcore (or another voltage fed into the CPU), hence the mobo issues. It's a shame the images don't want to work for me.

[bigben2k]

Yeah... for all my time here at Procooling (since May 6th, 2002), I have not seen any progress in Pelts, whatsoever. You'd think that this would be of interest to someone!

[redleader]

Originally Posted by bigben2k

Yeah... for all my time here at Procooling (since May 6th, 2002), I have not seen any progress in Pelts, whatsoever. You'd think that this would be of interest to someone!

I remember reading somewhere that pelts haven't really changed much in the last 30 years, let alone the last 3. It would be nice to see some more practical ones.

[Starman97]

The caps must be for the CPU core voltage, the tolerances are getting smaller
as the geometry shrinks. Current PowerPC chips are +/- 30mV in some cases.
That's really hard to hold when you have something like a FX55 chip that
burns nearly 100W at 1.2V core. it doesnt take much onboard or pin resistance
to drop 30mV at more than 50Amps IDD.

I predict that you will soon see switching power supplies mounted on the CPU
package to reduce the effects of contact resistance and lead inductance.

Either that or some 7/16" studs for Vcore and GND with some 00 gauge leads.

CPU packaging is going to have to change radically to handle 200W CPU die
with a 0.9V core which is what is predicted for 65nM geometry, 200Amps...
wow.. and the real killer is the current can change within nanoseconds
from 20% to 120% of max reated currrent. the 200W is an average.
instantaneous power can be much higher, maybe 2x. for a few clock cycles.

[Kobuchi]

AMD joins late; their patent just fills gaps left by others. Peruse the 11 references sited (previous, related patents) in thepatent granted. Half already embody a peltier embedded in the package, in one way or another.

Compare, for example, BAE Systems' earlier #6,559,538,
"Contained within the package, the substrate has a front side and a back side. Electric circuits are fabricated on the front side of the substrate, and multiple thermoelectric cooling devices are fabricated on the back side of the same substrate."

with AMD's #6,800,933,
"an insulating substrate, a semiconductor structure positioned on the insulating substrate and a Peltier effect heat transfer device coupled to the insulating substrate"

One is real synthesis, the other's just clapping established parts together. That's just one example. IBM got theirs granted in 2002, Intel's (most recent) in 2001, Sun's in 1997. I'm surprised AMD got this through. Good lawyers. Further reading of the patent reveals it a thorough dredging of everything others omitted.

[Groth]

"Half already embody a peltier embedded in the package" (emphasis added)

There is the difference. AMD patent isn't about standard pelts in the packaging or formed on the back side of the wafer, they are planning to embed very tiny pelts into the oxide layer of SOI chips.

SOI is great for reducing transistor leakage, but the insulating oxide layer is a crappy heat conductor. Tiny pelts will bridge that thermal barrier is a hell of an idea.

Think about it: instead of using a ton of energy to cool the entire die, they can use a small about of energy to cool specifc regions. Instead of setting a clock rate and voltage that suits the hottest, slowest parts of a CPU, they can cool those specific regions and up the clock or lower Vcore.

[Kobuchi]

You misquoted me, Groth, omitting my word "embed" only to place it where it doesn't belong. This is a key word here.

Originally Posted by Groth

they are planning to embed very tiny pelts into the oxide layer of SOI chips.

They may be planning to embed. My point was: that's been thoroughly patented already. Check the related patents here if you don't believe me. Neither are multiple peltiers invented in this patent. Here's an earlier one:

"Fabrication of arrays of temperature control cells of various shapes and sizes permits extremely precise heating and cooling of specific regions of the integrated circuit." - National Semiconductor

The AMD patent passed only because it is distinct from others by using the terms "positioned on" or "coupled to" rather than the already dogpiled "embedded". We can all agree "embedded" is ideal, but the fact is AMD missed it and is picking crumbs.

This patent also took an unusually long time to grant. This suggests much renegotiation of the original application, or something.

I have nothing against AMD. The article just gives a false impression of AMD leading the way here. They're not. They're behind by quite a few months.

[Groth]

I apologize for the misquote, it has been fixed. My intent was not to distort your words, but to add emphasis to the package part.

As for the prior art, the NatSemi patent involves peltier elements coplaner to the transistor layer and lateral heat pumping. They get regions of improved cooling at the expense of other regions and with a lowering of transistor density.

BAE extended the idea with their perpendicular heat pumping using pelts on the opposite side of the wafer. Transistor density is the same as without pelts, but there isn't the precise localized cooling of the NatSemi version. Additionally, there's the problems of two sided fabrication and making electrical connection to both sides of a die (which also limits heat sink or heat spreader contact possibilities).

The AMD pushes the idea further by using pelts on the same side of the wafer as the transistors (more localized cooling, easier fab, easier electrical connection) but in a seperate layer (preserving transistor density) and pumping heat perpendicularly (no new hot spots).

Yes, it's a synthesis. Yes, the Inquirer needs to calm down. But AMD's version does have advantages over previous incarnations and it is cool stuff.

[Kobuchi]

News writers have to butcher reality and cook it for our consumption, sadly.

The poker game at the U.S. Patent Office - wow. From that angle these corporations seem like prowling toms marking turf, and that dampened fencepost just happens to be a semiconductor. I wonder if any one can move and practically materialise without in any way infringing on another, and opening the gates of hell (the corporate lawyers). Sometimes I wonder how much invention is locked up by the same laws meant to promote it.

Anyway. The general - brandless - invention is super neat, and a certain kind of joy to read about.

[redleader]

Originally Posted by Starman97

The caps must be for the CPU core voltage, the tolerances are getting smaller
as the geometry shrinks. Current PowerPC chips are +/- 30mV in some cases.
That's really hard to hold when you have something like a FX55 chip that
burns nearly 100W at 1.2V core. it doesnt take much onboard or pin resistance
to drop 30mV at more than 50Amps IDD.

Its actually 1.5 v as its a 130nm chip still. Still I think the power figures are overpessimestic. If you believe the spec, adding 200MHz made the FX use 10 amps (!) more, while the previous 400MHz worth of jumps increased current by 0 amps. More likely they simplely decided to spec Imax higher on new chips.

I predict that you will soon see switching power supplies mounted on the CPU
package to reduce the effects of contact resistance and lead inductance.

Either that or some 7/16" studs for Vcore and GND with some 00 gauge leads.

CPU packaging is going to have to change radically to handle 200W CPU die
with a 0.9V core which is what is predicted for 65nM geometry, 200Amps...
wow.. and the real killer is the current can change within nanoseconds
from 20% to 120% of max reated currrent. the 200W is an average.
instantaneous power can be much higher, maybe 2x. for a few clock cycles.

Not going to happen, at least in the PC market. Intels all but given up on Prescott in favor of Dothan based chips and AMD's new K8s are putting out a lot less power. Even dual core Opterons are supposed to be well under 100w, and the dual core presott keeps getting delayed (last I heard they were saying '06). Likewise IBM has scaled back power use on their desktop chips this generation, and seems to have little interest in ramping them up much higher.