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Water Block Design / Construction Building your own block? Need info on designing one? Heres where to do it |
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#26 |
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Perhaps a custom wb base with the needed raised cube for this experiment would make things easier. Combine that with phenolic resin of the same size as the base of the block (but with a cutout for your cube) so that wb mounting isn't too compromised and so the insulation is good.
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#27 |
CoolingWorks Tech Guy Formerly "Unregistered"
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whew Les, something of a chore to re-read all that
for some time I have been using a nominal TIM joint value of ~0.1°C/W (for my 100mm² die) - and this approximate value has been confirmed by other labs did we not continue the discussion you linked to ? (elsewhere perhaps ?) I am now wondering how I got to 0.1 pHaestus the Aavid paper describes such a calorimeter, but it is much bigger |
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#28 |
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Yes bigger is easier. What's the fun in that
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#29 | |
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Was tacitly agreed to use, until we knew better. Based on using the 0.05c/w Die t/c offset and ignoring the wb offset - much smaller cos of spreading in the Surge"s base. The details are somehat hazy to me now.When collect my thoughts will edit if details are incorrect |
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#30 | ||
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Regarding TIM "R"
I pulled some numbers out of thin air, but I don't think they are unreasonable. Assumed: 1. Full, total contact between core and copper (k=392 W/m*°C) is 1% of total area. (total guess) 2. Remaining 99% area is average 0.1mm deep (probably less) and 3. filled totally with compound @9 W/m*°C (Probably BS) =0.01*k copper+ 0.99*k paste= k TIM =12.83 W/m*°C C/W = dT/Q = L/k*A = 0.0001m/12.83W/m*°C*0.0001m^2 = 0.077942 C/W The silicon die surface itself is not included in this. It is assumed to be the core temp, which it isn't. Making 0.08 W/m*°C too low. Probably. But I am not sure yet how to handle that. At this point it doesn't matter too much. Quote:
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BillA's TIM shim experiments are partly what led me to this, but I always thought that idea was missing a needed data point. Hence this way. Any good numbers on the conductivity of ETP C110 copper? So far I have seen: 392, 391 and 388 W/m*°C which is instantly an uncertainty of 1% How does one handle error summation? With what I work with they are added quadratically ie E tot= sqrt(E1^2+E2^2...) but that may not be applicable in this case. Cheers Incoherent Edited to correct erroneous poly k Edited again to correct C/W 0.77942 Last edited by Incoherent; 12-01-2003 at 09:03 AM. |
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#31 | |
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The resulting date would encompass both the thermal conductivity of the particular device and shadowing effects. |
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#32 | |
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But it starts getting complicated. ![]() Cheers Incoherent |
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#33 |
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pHaestus,
Been thinking about the clampmeter setup. Regardless of how accurate the power consumption of the CPU is known, there is still the issue of the leakage heat. Do you still have the Swiftech chiller? Ideal would probably be to control the chiller such that the averarg dT between CPU substrate and mobo was held at zero. (Not difficult or expensive, but time consuming to build such a controller.) Alternatively, operating the chiller at different voltages would allow the leakage path(s) to be characterized to some extent. Anyway, if you want me to place a bid on a clampmeter, let me know. |
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#34 |
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pHaestus
you can keep the chiller longer if you will be using it |
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#35 |
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Since87:
I have a nice PID controller that I believe MAY be able to do the temperature control with some accessory parts. I don't at the moment have an adjustable voltage PSU that could power the 2 226W peltiers though. On the other hand smaller peltiers may be fine for keeping CPU at 30-36C (mobo temperatures near socket approximately). I am torn on the clampmeter. If I could get decent data without a huge time expense then I think it would be a huge benefit to the 3-5 of us really interested in real CPU temperatures. But the SocketA is on its last legs now, and I have concerns that by the time I am measuring real input power from my Tbred that people will only care about A64s and Prescotts. This brings up a question for you though Sean. With my motherboard modifications I could run the MAX6655 on an Athlon64 or Prescott provided I could solder wires to the diode pins. I fear this is way out of my league, but I recall your mentioning that you had some skilled women at work who could solder miniscule parts for cookies. Assuming I could find a spare motherboard and CPU for the testbed (I am the only person on earth that hacks up new equipment for testing and uses old gear for gaming and daily work), do you think they could handle soldering wires in such tight quarters? Also I am wondering if my money and time might not be better spent on finishing die simulator (I need to insulate it, buy two DMMs, and fire it up). I could then just measure deltaT across the waterblock on die sim and on real CPU and get an estimate of power for real CPUs that way. Should be ok with these new 100W+ chips ![]() Bill: Thanks for the offer. I'll decide upon whether to send it back based upon how this thread goes today.
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#36 |
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Some progress.
![]() I know I know. Crap thermometer. Consider it a proof of concept. I am generating a correction curve like this before I install it for a test drive sans insulation. ![]() This curve is generated from about 50 images like this with different water temperatures: ![]() I will keep you posted. Cheers Incoherent |
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#37 |
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It works.
Q numbers for an Athlon XP 2500 at stock: Unloaded: 35.24W Loaded: 49.50W My data is here here (right click, save target) Some images: ![]() ![]() ![]() Holiday now, I will get back to this in a few days. The temperature data needs to be properly corrected and so my final numbers will be a bit different. The principle appears to be valid. Even with this shitty Compunurse thing it seems that the dT is pretty stable at a given load. It is actually very sensitive to small fluctuations (opening/moving windows etc) I see that my internal diode is out by several degrees. Interestingly enough the TIM dT seems to be about 5-10 degrees. My AS application is not particularly good though. Cheers Incoherent |
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#38 | |||
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What kind of inputs? A voltage input would be ideal. Preferably some sort of differential voltage input. What I envision as a sensor setup is four pairs of differentially wired thermocouples. One junction of each differential pair would be thermal epoxied to the CPU substrate at a corner and the other junction of the pair would be thermal epoxied to the motherboard at the corner of the socket. With all eight junctions glued down, the differential pairs would be soldered in series. This setup would give a 0V output when the average of the four dT's was 0. A simple amplifier would go between the thermocouples and the PID controller input. The gain (scaling) accuracy of the amp would be irrelevant since the goal would be to maintain the PID controllers input at 0. Only the offset of the amp would matter. Of course, doing this leaves you with a CPU that is glued to a tether attached to the mobo, but why should anything be convenient? Quote:
I'd say if the two diode pins were 'at the edge of the forest', then yes. If the diode pins are not along an edge of the grid, I don't see a way to do it. The best that might be done is to solder wires to the tips of the pins, but then serious surgery would need to be done to the socket to get the CPU installed. Not something I'd take on with an expensive chip. Quote:
In terms of benefit to the watercooling community as a whole, the die simulator is almost definitely the better investment. While the results of this CPU testing may well be very interesting to a few of us, I doubt that much of practical value would come of it. However, what you enjoy doing is the most important criteria, IMO. |
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#39 | |
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Mandatory check confirms your maninpulation, giving Wattages ~ 35.2 and 49.2. First impression is that all thermal gradients are sensible. Thermal flux uniform ?Think that is still a biggy.Heat source definitely not. Calibration with a known uniform sources on the agenda? Or ,better,the standard DeltaT(out- in)xFlowRate.* . Think your temperature calibration is more than suffice for exploratory work. Would love more numbers from current set-up with any single variable you find convenient. Impressed. * Edit Last edited by Les; 11-27-2003 at 06:58 AM. |
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#40 |
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Incoherent, perhaps I missed it, what program are you using to generate "load" on the CPU.
35W at idle seems rather high to me. Perhaps your motherboard isn't doing CPU disconnect? |
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#41 | |
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Quick answer. Got to drive to the coast, CPUBurn and P95 for some readings. The numbers above are using CPU burn. I have no time ![]() I'll be back in a few days Re CPU disconnect, hold that thought, I am ignorant. Cheers Inc |
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#42 |
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Wow this turned out amazingly well.
I wonder if I could get someone to make me something similar but with two small round holes for my type T TCs? With better temp resolution and accuracy for all measurements perhaps I could get at where I want to go without all that ammeter soldering. Yes I realize the real solution would be to do BOTH.
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#43 | |
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Both may be useful for evaluating secondary heat paths. However for heat-sink/cpu testing I do not see this device replacing the standard DeltaT(out-in)x Flow Rate method. .It changes the nature of the heat-source for the HS from a cpu to something approaching a Die simulator.It also complicates calculations with a 2nd TIM layer. . |
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#44 |
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What are people's thoughts on accuracy? Temperature resolution/accuracy, probe separation distance, thermal conductivity, non-uniformity of die heating, heat shadowing, . . . .
You're good with the numbers, Les. How will the errors propagate? Which factors warrant the most work? |
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#45 |
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Very nice work Incoherent.
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#46 | |
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#47 | |
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As far as the blocks dimensions go the outside dimensions are 7.8x14x12.1 mm. These are accurate to whatever I can get with my little mill's xyz slides and vise. Figure +/-0.05mm. I believe it is actually better than that, more like 0.02mm. The (1mm) hole spacing is 10mm, accurate to better than +/-0.04mm. Because it is a single movement with the X cross-slide I am confident that it is more like <0.01mm. However the location of the (0.5x1mm) probes within the holes is uncertain, within +/-0.2mm is my estimate, so that is the accuracy that must be assumed. =+/-2%. Temperature resolution is hard to say, with a lot of measurements to average it should be reasonable (0.1°C), accepting that the calibration method is valid. Accuracy is probably +/-0.1-ish, also dependent on acceptance of cal method, bearing in mind that absolute accuracy (ie relative to 0°C) is not the issue, rather linearity and compression/dilation (?) accuracy of the calibration reference, in this case an alcohol thermometer. Non uniformity of die heat. No real idea, instinct says it's only significant for the thermistor closest to the CPU which only has 1mm to even itself out. Heat shadowing. Also not sure. Something is dancing around my brain saying it's irrelevant but I can't qualify it yet. Something similar to the reason the TIM joint is also irrelevant. (Thinking... ...might need the hole all the way through to be true... maybe L needs an offset...) Errors. My simplistic approach would be to do three calculations, one with measured values, one with worst case minimum and one with worst case maximum, and derive the end accuracy from that. That is not how statisticians do it though I am certain. Cather, I am showing my ignorance here, what do you mean by "CPU disconnect"? Is this some way to force the CPU to full idle? I seem to remember some software (waterfall?) that did this. I am calling "running no programs except Excel", Idle. Is there a more correct alternative to this? pHaestus, seeing as I feel a bit responsible for this, I could make another one for you to try out. I would need to know the TC hole diameter and CPU type plus what hole spacing YOU feel comfortable with. If you can measure the temperatures accurately it would be advantageous to keep it as small as possible (5mm?), less secondary path loss. I haven't measured beyond stock voltages yet and already temps are getting pretty high. Let me know if you're interested, I can do the data analysis if someone verifies it. My data is here in this directory. OK, now to record some more data. Cheers Incoherent |
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#48 |
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An alternative to building a second setup would be for me to pull my Barton out of main rig and put it into test loop. I can get an estimate of K7Burn Watts by measuring delta T across the waterblock and we can just correlate remotely. How to determine Vcore is the same though for different motherboards and systems? I keep meaning to solder a DMM to some motherboard pins...
Oh as an aside I just finished running a quick test of a waterblock to see what W estimates I would get. Results SEEM to be reasonable (C/W values line up predictably with BillA's testing, W estimates mesh well with earlier estimates from MCWChill testing, etc) but are off an ENORMOUS amount from benchtest.com calcs (and presumably radiate). Jim's calculator spits out 113W for a Tbred at 2200MHz 1.85V, while his "88% rule" yields 99W. Not a reflection against Jim or Benchtest or Radiate; it's just the numbers from mfgr are not very reliable for AMD chips I think. It would be nice to get some complementary techniques running at the same time to get a handle on this but at least in a preliminary fashion I am feeling pretty good about our W estimates over calcs.
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#49 | |
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#50 |
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I will have to figure that out for this MB (a7n8x-dlx), CPUidle does not seem to be able to kick it into true idle.
Anyway some more numbers. I have corrected the temperatures using a fitted calibration curve and the Q figures read thus: 1833Mhz 11x166 1.65v Q loaded CPUburn-in, 54.43W Q Unloaded (not idle?) 36.41 1833Mhz 11x166 1.85v Q loaded CPUburn-in, 74.29W Q Unloaded (not idle?) 47.89W 2200Mhz 11x200 1.85 Q loaded CPUburn-in, 88.44W Q Unloaded (not idle?) 57.06W A word of explaination for the correction. The Thermistor curves relative to reference were each adjusted using a 4th order polynomial fitted to them. A bit of Excellery which takes care of their offsets and non-linearity. I am pretty sure this makes it fairly accurate, mathmaticians please give it a critical look. It's late. Cheers Incoherent |
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