What I am concerned about here winewood is that adding an IHS to the die simulator IS going to increase the variance in the results. It IS going to be affected by the aging of the paste inside as it dries/settles. It will dramatically be changed by remounting the IHS. So in my opinion any testing with one is going to introduce more problems than it is worth. I see this honestly as the same argument that the uneducated use to advocate "real world testing" with CPUs.

And a 40mmx40mm TEC is a very different heat source than a CPU. A TEC truly will have the heat spread through the entire surface while the IHS will not. I still doubt that the lateral heat transfer is all that great. If the IHS could truly efficiently spread heat across its total surface then one wouldn't gain such big temp drops by pulling it off.

I mentioned these points already.

a VERY valid point. Thank you for explaining it in that way. A lesser orator couldn't have done so, in such an effective manner. I'm sorry if I failed to see it that way earlier.

Could there be a way to simulate a IHS? Like machining a copper block and cutting out a core size copper core area just below the upper layer, which could be left to be the size of the ihs? This way you get the IHS (kinda?? :D ) no remounting issues. Better or .. closer real world look? Sounds harder to make, but at least it would/could perhaps yield a more realistic test? The heat would still come from the core area, but be allowed to spread somewhat.

How about just purchasing a P4, and removing the IHS, and slapping it on the die simulator? :D

Though I guess that brings up the TIM issues again. Does anyone know exactly what intel uses as a TIM for the P4 die to IHS thermal impedance? Obviously something that doesn't dry out and start performing worse....

KE: Please read the above posts again :)

Lol, I did read them. Seriously, just ignore me ;).


EDIT: Or, if you choose not to, what I am saying is that if the way that Intel attaches the IHS can be replicated, then perhaps that would be a valid route to take.

1) What I am concerned about here winewood is that adding an IHS to the die simulator IS going to increase the variance in the results. It IS going to be affected by the aging of the paste inside as it dries/settles. It will dramatically be changed by remounting the IHS.

I agree the aging of the paste etc will cause more trouble than it’s worth for what we are trying to get. Although one could argue that this also happens on a real CPU.

2) I see this honestly as the same argument that the uneducated use to advocate "real world testing" with CPUs.

Again I agree no way a true C.W could be obtain using a real CPU but it is the only way to test on – a real CPU. So it has some value but not with obtaining a C.W

3) And a 40mmx40mm TEC is a very different heat source than a CPU. A TEC truly will have the heat spread through the entire surface while the IHS will not

Again I agree. So why are you just testing a area of about 10 mm x 10 mm when you should be testing a area of about 40 mm x 40 mm to better simulate the new CPU’s

After all the purpose of this type of testing is to try to predict how a block would work on CPU putting out a certain heat load over a certain area. I am sorry to wake people up here but that area is no longer 10 mm x 10 mm and to call your simulator a CPU simulator when CPU’s are no longer being made with an exposed core? I agree with winewood if you are going to simulate a block on a CPU then the area that emits the heat should be as close as possible in area to that of a real CPU (with IHS) with the heat being produce in the center.

I will say it again (what is this 4 times now)

I DO NOT BELIEVE THAT THE P4 IHS EVENLY SPREADS THE HEAT THROUGHOUT THE TOP OF THE HEATSPREADER.

DO think about this. How thick is the IHS? If you built a waterblock baseplate of that thickness, would you spread the heat out to a 40mmx40mm region? NO YOU WOULD NOT. Now let's think about this again. Now let's blue sky. Say you DID manage somehow to spread the heat out pretty evenly over the entire surface of the chip. This I assume you are predicting would result in lower CPU temperatures. WHY THEN DO TEMPS GO MARKEDLY DOWN WHEN YOU REMOVE THE IHS?

I am capitalizing for emphasis not to be rude. A TEC is a very different animal from a 10x10mm heat source with a thin cap on it.

And testing with CPUs is not going to get you where you want to go if your goal is serious waterblock performance numbers and ranking. FWIW, my "yesterday's" AMD CPU testing is far more accurate than anything end users can do on Athlon 64s or P4s. Too many pins to deal with the soldering I am afraid and all mobos with integrated diode readers. Intel doesn't even give you access to the hot areas with their diode.

saw that comin... LOL :D

Some relevant data:

http://www.flotherm.com/technical_papers/t281.pdf

Skip to page 12 unless the math is of interest. Note where the probes are arranged in space. Then check the baseplate temperatures for those probes with the copper and aluminum heatsinks. The heat just doesn't seem to spread all that much to my eye. Is there another phenomenon here that I am not aware of? The only thing I can think of is the 100lb force, but I don't expect that to significantly improve the lateral heat transfer through the IHS.

Also note that, when lapped, Intel IHS has been shown to be copper.

//edit: My earlier comments were not true. I was looking at their pretty colored heat distribution graphs and must have gotten the aluminum and copper heatsinks confused or something. Sorry for the confusion. The copper heatsink does spread the heat out more laterally if you look at those simulations.

The copper heatsink demonstrates (edit)more (/edit) heat spreading than the aluminum one.

If you can come up with some good evidence that the heatspreader can evenly distribute a CPU's heat to a large region then I would be glad to seriously read through it. It doesn't seem reasonable to me with what I have read and seen though.

Perhaps...
since Cu dissapates heat faster than Alu, the Alu has time to transfer it out further? Just a guess. Thanks for the link.

Oh.
Contrary to all my understanding of Spreading-resistance and not how I read the paper's conclusion : "The copper-layered heatsink however seems to spread heat better than the pure aluminium heatsink."

As implied in a previous posts (http://forums.procooling.com/vbb/sho...?threadid=5416 and http://forums.procooling.com/vbb/sho...5&pagenumber=3 ) it is suggested that the magnitude of this effect will be dependant on the heatsink's c/w.

http://www.jr001b4751.pwp.blueyonder.co.uk/hsFilm.jpg
http://www.jr001b4751.pwp.blueyonder.co.uk/IHS.jpg

I looked at article again and I am completely incorrect. My only guess is that I looked at the copper and thought it was aluminum and vice versa. Now Les in your opinion would a thin heat spreader like the P4 be able to effectively spread the heat out over the entire heatspreader, or would there still be a fairly large "hot spot" over the die?

0.1 mm TIM, isn't that rather generous? ;)


I like the way that this is progressing.

If I can suggest, let's seperate the issues into their individual components:

1-What is the size of the die, under the IHS? (AMD, Intel)

2-What is the nature and properties of the TIM joint under the IHS (AMD, Intel)? What are the dimensions of the IHS?

2-Given the above info, how far out does an IHS spread the heat (AMD Intel)? (that should give us our ideal heat die size)

3-What is the temperature difference that can be expected, by removing the IHS, as reported by the on die diode (AMD/Intel)?


If we knew the nature and properties of the TIM joint under the IHS, we could add a "correcting factor", for those people that are going to do away with the IHS (which, BTW, is not going to be common).


I haven't been succesfull yet, in confirming the AMD core sizes. Seems like AMD only releases info about the fully assembled package, so it doesn't include dimensions of the die, the IHS, nor the TIM joint. I still have to go over the Intel website, for the same info (I'm not looking forward to that one!)

I know the manufacturer of the Intel TIM material, between the die and the substrate: I'll have to see if Intel used the same manufacturer for the die-to-IHS joint.

pHaestus
you are correct in your assumptions and extrapolations
a suggestion: ignore comments from those w/o (some form of) credentials
- such as a technical education and/or testing experience

you are needlessly 'debating' with people who simply do not know much about which they are pontificating

truly minimal lateral dispersion,
but excellent crush resistance

I have to agree with Bill: the spreading is "minimal": that's what I've been saying.

Consider a 12 by 13 die (156 mm^2), that it's not exactly the same as a P4's 146 mm^2 (12.1 by 12.1mm). Whatever spreading happens with the IHS, is fast becoming a moot point.

The real issue, is how and where to mount the thermal probe. pHaestus, what did you pick?

That is the question.
Bill has given has given the practical answer.
My previous post was one of my several attempts to gain insight into it.
It depends on the how one identifies "spreading of heat".There will always be a "hot-spot" but to analyse the temp profile I guess a refined CFD programme is required - much beyond my self taught heat-tranfer expertise.

In referring to a P4 (or AMD for that matter) rather than a "Heat-Die" the issue is further complicated by the "Hot spot(s)" within the Die. Have only briefly looked at this problem :-
1)Gathered useful thoughts speaking to Navin (Artic Silver).He directed me to the idea that in AMD Morgan's the Temp differential between the "Hot_Spot" and the "Measuring Diode" may be equal to the differential between the "Measuring Diode" and the back side of the CPU. As such It may be possible to analyse data to produce a "Hot-Spot" Temperatures - so far my feeble attempts have been futile.
2) I considered small(1mm Sq) Heat-sources in some analysises of Mini-Channel coolers http://forums.procooling.com/vbb/sho...?threadid=4477 . This was Pooh-Poohed as being irrelevant and has not pursued.

Right… I have a degree in electronic engineering and have a lot of experience in electronic prototype testing. From what I have been taught and have seen for myself especially with heat in electronics is that you always allow for a little extra heat dissipation and a little extra power consumption. Maybe the best way to get a good C/W of a block would be to take measurements at five different points (at the same time) and the average of those points be assigned as a true C/W for the block. Measuring only one point IMHO seems like running optimized drivers – sure it looks good but is it really a fair measure of performance? Now I don’t want to read again that we are simulating a newer CPU because with only the die size you are only simulating a die. If you want to get an over all C/W take readings at more than one point on the block. Again I know I am adding a little extra work and all those extra “if” that could happen – Hey no one said trying to simulate a constantly changing CPU was easy. –

Have to go this new form of simulation is catching on, My plane in my simulator no longer flys but only races around on land because it is easier to simulate.
:dome:

what on earth are you trying to model ?
the cpu's heat generation ?
or the "C/W" of the cooling device ?

uneven vs. uniform heating is addressed through a 'correction factor'
-> which is UNIQUE for each model of processor
you will never know these values,
nor do you need to in order to compare one cooling device with another

and the subject is actually considerably more complex than described,
keep it simple and something useful might be accomplished

less talking and more testing will yield great results

Joemac since you are an electical engineer with a lot of experience in testing I am sure you can recognize that the tests you want to see are not at all practical. If such is what you believe is the proper way to test, then an investment of time, money, and effort into computational analysis (such as done in that flotherm article) would be more useful than drilling holes into a waterblock.

Again if you take Bill's statement as true then lateral spreading is minimal. That would mean my approximation of a small die as heat source is still much closer to reality than your TEC. And what of just sticking a heatspreader onto the die? Other than the reproducibility issues discussed already, there is the issue of exactly HOW Intel and AMD do this. I suspect there must be something fancy involved in the case of Intel or else Bill wouldn't have an NDA. Don't get one of those for "we just slap it on". And so you are just trading one simplification (ignore the IHS) for another one (put one on in a manner not consistent with the chips). Such is life.

pH, here is what you need to do. make a model for every single cpu die ever made, then make another set of them to put IHS on. wouldn't that be the only way to test everything correctly? and obviously im not being serious. but if you just make one die sim, why put an IHS on it since P4 and AMD cores and IHS (i'd assume) are different.

Or.. just for arguments sake. Make ONE replicated die that simulates one of the new chips incorporating an IHS. This way you can say, I have replicated the heat from the AMD standard as close as possible. No one bench can replicate all standards, just attempt a single one with as much accuracy as possible. Not doing so would be acceptable if a major player wasn't putting the IHS on. However, since the IHS size is so large, and I see that there may be an issue with heated airpockets around the core that could come into play the longer a chip is powered... just a thought. I don't think these areas will stay room temperature.. in fact I wonder if they could reach 10C+ over amb.

Model it or test it by all means. Don't wait for me to do it. I reserve my testing for the things that I find interesting and stimulating. This line of research doesn't do it for me. But I will be very intersted in your results.

And.... I think that is the best reply.

I wanted this just to be discussion, not argument. I think of a way that I can do it.