What do you think of this Vcore stabilizer?

[GigaFrog]

After my failure on remote sensing (ATX PSUs can't be remote sensed easily), I decided to go another route to control the Vcore fluctuations.

My mobo uses the HIP 6021, but this applies to any programmable Vcore regulator (you need access to the VID pins).
This circuit uses the same PWM regulator than you can find in most ATX PSUs (TL494).
The principle is to add a second stage of regulation (the first stage being the one on the mobo), driven by an ultra accurate voltage reference (I found some 0.1% references), that will switch dynamically one of the VID pins to correct unsufficient Vcore regulation.
The second stage is more accurate than the first stage because it does not handle the high current to the CPU, and because it uses a high precision voltage reference.
Here is the schematic I came up with:



sh.., the link does not work.
here is the URL, copy-paste it in the address bar: http://www.geocities.com/alochin/temp/Stabilizer.jpg

Or try this:


The Vcore regulator must be switched between two consecutive settings, so that its fault detection will not trigger.
The second stage must switch 1/10 or lower the speed of the first stage.

Datasheet of the TL494:
TL494

I am planning on building and trying this circuit.
What do you think?

[ 12-20-2001: Message edited by: GigaFrog ]

[QazTaz]

red kross and error 404...




but the Vcore, I checkt it wiht an oscilloscope, and atleast on my kg7 it's perfectly stable @ 2.5v (tb@~1700)...

on my new epox 8k7a+ it's looks fine at 2.1v (haven't tried harder on that one yet)

so I don't know....

[futRtrubL]

QazTaz you actualy have to drag selcet the text of the link and copy it, then paste it to your address bar, for some reason just clicking doesn't work.

Once I did that the pic in the post works now. Maybe geocities doesn't allow linking to pictures on their servers from outside sites.

Anyway, GigaFrog, that looks great, I would love to hear how it works out. What software did you use btw?

Edward

[QazTaz]

still 404.....

[GigaFrog]

I'm still working on it.
I don't known what's going on with Geocities, I can't even access the page myself! I need to fing a host for a few pics (my "going above 2.05V" post has also pics that are unaccessible either )

As is, this circuit does not work. The Vcore regulator does not accept 5V in its VID inputs. It accepts 0V or open high impedance.

I added schmitt trigger - inverters (74HC14) in case it was the ramp-up or ramp-down that was too slow. Did not work either.

I need to buy some FET transistors and connect them to the VID inputs. I already have the inverters (74HC14) that will drive the FET. Injecting 5V to the gate of the FET makes it behave like a short to groung. Injecting 0V makes it behave like an open circuit. I am concerned about the transitions though (ramp-up and down). I may need to synchronize the Vcore stabilizer with the Vcore regulator. That will add some complexity.

I am not too surprise by your stable Vcore, Qaztaz. Some Athlon mobo have a quad phase Vcore regulation, that leads to very stable Vcore. Most PIII mobo have a single phase regulation, resulting in very ugly waveforms on the Vcore. I have some plots at home, I may post them if I fing a host. My Vcore varies by more than 0.1V, thats a lot for a Voltage of 2V.

All this is fun (at least to me ), but I don't have enough time! I have other projects (upgrading my truck with water injection, plus my un-finished basement), so it has being more than a month since the last time I messed up with computer hardware.

[QazTaz]

well, 0.1v is TOO much... you get heat like @ 2v and stability as @1.9v... looks lite a damn good idea to do something about...

I notice a stupid thing on my 8kha+ today, there is 6 mosfets (3pairs), and 3 of them is on the backside of the motherboard!!, quite tricky to cool them good... ...

[Brad]

oscilloscope readings I have seen show that the voltage is fairly constant where the cpu is under a constant load. this is from p3. athlon and evil p4 boards.

Where the big differance is occurs when changing from load to no load, or vice versa, where I've seen up to .3v spikes common, I don't know if this is why acpi sucks so much for overclockers, or what, but I think this can't be too good a thing at all

[GigaFrog]

Regarding ACPI, I was thinking of looking at that too (I have way too many projects!)

Because of the suddent current surge that results in a CPU "waking up", there must be a dip in the Vcore. This may be what makes the CPU crash where it comes out of sleep mode.

The solution to that would be to set the FSB to its lowest setting (like 66MHz) during the few milliseconds that will allow the Vcore (and all other voltages as well) to properly set. Then the FSB switches back to whatever it is set in the BIOS.

I never did any research on this (yet). Maybe just another bad idea ???

[GigaFrog]

To catch the fluctuations that may appear on your Vcore line, you need a very good scope. I borrowed a Tektronix 400MHz digital scope from work. The scope would trigger down to 1.95V, and up to 2.23V.

Some of the shots are taking in DC voltage. They show the true voltage values, but lack of definitions, because of the higher scale required. For more definitions, I also took AC plots, but you don't get true voltage values with that, only the variations from average.

Here are the shots:
Vcore during boot (DC)

Same as above (AC) better definition, faster time scale

Vcore at iddle (AC) 2.23V overshoot

Vcore under load (DC) 1.95V undershoot

Fluctuations due to PWM regulation (DC)

Same as above (AC) better definition

And this last one was a surprise. It happened during a hard-drive access.
Effect of a HDD access on Vcore
When I saw that, I put electrolytic capacitors on the molex that connects to the HDD. I had crashes during HDD access in the past. Now I understand why!

Hope these pics will show up correctly!

[Brad]

those links just take me back to the main page

[GigaFrog]

Sh..t

How the hell can I correctly post pics??

[EMC2]

Make them PNG files (best compression vs picture quality) with 256 colors max. Then you can attach them to your post (as long as they are 34KB or less). Maybe combine several of the pics together if there are only a few colors (say 8).

The reason the pics can't be seen is because to see them the person looking has to log in to that server Someone (I think it was yahoo) let's you post pics in a portfolio and anyone can see them without requiring a log in.


Side note: when you took the scope pics, did you a) take them in real-time mode not that useless "equivalent" mode and b) did you use a good high frequency probe with a very short ground tip on it at the nose of the tip?

[GigaFrog]

Hi EMC2, thanks for the info. I'll try to post the pics correctly. This is p...ing me off!
Yes, I had a good scope, a Tektro (a TDS xxx) with a 400MHz bandwidth.
No, the probe was not connected perfectly. To measure the Vcore at the CPU socket, I soldered two wires of good diameter to the back of the mobo (CPU socket) and twisted paired them for about a foot to a terminal block where I was connecting the scope probe. I figured that most of the noise that would couple to the wires would be common mode (coupling on both + and - wires and therefore cancelling itself). No current goes through the wires, as they are only used for probing.
The probes come with the scope, they are x10 with a 10pF parasitic capacitance.

You seem to have very good knowledge on the good useage of a scope.

I took real-time data. What is the "equivalent" mode?

[EMC2]

On most Tektronix digital scopes there are two settings for the time base. One is what they usually label as "equivalent time" and the other is "real time".

The real time mode is just that, it takes all samples in a single sweep at the specified sampling rate and directly displays the values captured.

Using equivalent time (puke!) the waveform is built from multiple sampling sweeps, with each sweep offset (via adjustment of the input delay) from the others by a small amount.

The equivalent time mode is fine if your looking at general waveform shape of repetitive (say a clock) signals and you are not concerned with glitches, spikes, and other random features. However for looking at non-repetitive signals or looking at/for spikes, glitches, ringing, etc., it suxors!

Regarding the query on the probe and hook-up, there are two issues, noise and frequency response. Your described setup for what you were looking at would take care of most of the noise issues, but if you were trying to look at edge rates, high frequency glitches or noise, and other critters of the high frequency world it wouldn't give you accurate data

FYI... you could have used a 100mv/div setting and used the vertical offset to look at the signals with DC coupling and still had ~5mV accuracy. (Also, you can use the zoom functions of Tex scopes to adjust the displayed waveform area of interest to full screen size.)

[GigaFrog]

I converted the files to PNG.

First pic: Vcore during boot (DC)
png file attached.

[GigaFrog]

Apparently, it worked.

Following shot: Same as above (DC) lower definition but absolute voltage scale.

.

[GigaFrog]

Vcore at iddle (AC) 2.23V overshoot

[GigaFrog]

Vcore under load (DC) 1.95V undershoot

[GigaFrog]

Fluctuations due to PWM regulation? (DC)

[GigaFrog]

Same as above (AC) better definition

[GigaFrog]

And this last one was a surprise. It happened during a hard-drive access.
When I saw that, I put electrolytic capacitors on the molex that connects to the HDD. I had crashes during HDD access in the past. Now I understand why!

[GigaFrog]

Note: These plots were taken before I did the VID4 mod on my mobo (to get 2.2V Vcore stated in my sig).
At the time I took these plots, my Vcore was set at 2.05V.

[EMC2]

The next to last pic (labeled "PWM fluctuations?") does indeed look like a classic PWM signal. I don't think it is the VCore signal though. The frequency of the signal in the pic is about 18Khz. That's more in the range of the main P/S switching frequency and well below the bottom end of the HIP6051's spec'd operating range (50Khz to 1Mhz). So, it's most likely from your main P/S. The other possibility is it's from the video circuit (vertical sync) and the decay is caused by the capacitance of your measurement methods (the twisted pair wires). To figure out which it is, you could look at your +5V and +12V rails coming in to the m/b and while looking at the VCore switch your video mode and see if the frequency of the signal changed.


In general, from looking at those pics the basic answer is -

1) a VCore circuit that has poor dynamic load characteristics do to a) single-phase design b) too low a frequency of operation c) poor frequency response on the output filter d) all 3 of the previous.

and

2) poor power filtering do to a) not enough bulk capacitance b) too high ESR values on the bulk capacitance c) not enough or incorrect values of high frequency decoupling d) too much inductance inline with the filter caps e) all 4 of the previous.


If you remember, there were a lot of issues with VCore supplies when the P3s first came out and m/b manufacturers scrambled to adjust to the high dynamic current requirement presented by newer processors. The situation became tougher when AMD released their newer processors, which were even more demanding. These things are why now you see 3-phase (and even a few 4-phase) designs, extremely low ESR bulk capacitors, much higher (up to 2Mhz) operating frequencies, and newer PWM controllers that adjust mid-cycle (newer ASUS boards) for VCore circuits.


Regarding the HIP6021, it is spec'd as having a +/-6.5% dynamic load tolerance. At 2.05V, that's ~133mV (which is in line with your observed measurements).


As far as your Vcore adjustment circuit - you won't be able to affect any improvement regarding the types of fluctuations you show (short term, lasting in the usec range). To solve those with the existing VCore circuit design, you only have 2 feasible choices that I see.


Depending upon the HIP's current operating frequency and the inductor used, you could increase the operating frequency to help with fluctuations. It won't solve the problem, just help some. There should be a resistor connected to pin 23, this sets the frequency. The limiting factors will be the inductors used in the Vcore circuit and the gate capacitance of the MOSFETs.


The other route is to improve the filtering. Don't know what's on the CUSL in that regard (ASUS usually is pretty good in this area), but the goal is to increase the total bulk capacitance (there is a limit do to surge current issues), lower the impedance of the filter and power distribution (lower ESR on capacitors, lower inductance in the circuit connections), and improve the high frequency filtering in the range most needed. To do this, you would need to look up the specs on the caps currently used to see if lower ESR caps are available (and higher capacitance in the same footprint). Sanyo, Rubycon, and Vishay all make very good ones in that order. (don't like the nichicon ones much myself) To lower the inductance in the circuit connections, you can use braid or multi-stranded silver wire to parallel m/b connections. Ground connections are of particular importance. For the high frequency filter side of things, adding high quality ceramic caps of either .1uf or .01uf at strategic locations would help. (across the bulk capacitors, stacked on the processor socket pins/existing capacitors). So would lowering the inductance of the circuit connections.

Of course, the question becomes - how much effort and expense for what gain - is it worth it


ps. You might want to turn your signature off when posting a sequence of pics like that out of courtesy to the great guys that provide these forums Of course, my blabbering sometimes should probably be limited too :O

[EMC2]

BTW - extending the reset time at power up can help with the initial turn-on issues (gives VCore time to stabilize).

[GigaFrog]

This is very good, thanks EMC2

I already did the high frequency ceramic caps, both in parallel to the bulks, and in the CPU socket .
A total of ~50 caps (100pF and 10nF).

Before adding high frequency caps: max CPU clock was 1035MHz.
After adding the caps, max CPU clock "jumped" to 1050MHz (a big 2.5%, waow!).

I then added bigger electrolityc capacitors, but is did not help. At one point, the quality (ESR and ESL) of the caps is more important than the capacitance value itself.

I though of increasing the PWM freq of the HIP to 1MHz, its maximum, but never decided myself to go through the trouble (as you said, is it worth it?).

The vcore stabilizer is intended to reduce (or suppress ) the drop from 1.13V idle and 1.03V load, both stabilized. You are right, it will not affect noise.